Silicon-on-insulator (SOI) materials offer potential advantages over bulk materials for the fabrication of high performance integrated circuits. Dielectric isolation and reduction of parasitic capacitance improve circuit performance, and eliminate latch-up in CMOS circuits. Compared to bulk circuits, SOI is more resistant to radiation. For example, silicon-on-sapphire (SOS) technology has been successfully used for years to fabricate radiation-hardened CMOS circuits for military applications.
Circuit layout in SOI can be greatly simplified and packing density largely increased if the devices are made without body contacts (i.e. the body region of these devices is kept floating). However, using available SOI material, partially-depleted MOSFETs typically exhibit parasitic effects due to the floating body. The most common of these are the "kink" effect and the "bipolar" effect, which are described in detail below. The partially-depleted devices are such that the maximum depletion width in the body is smaller than the thickness of the Si layer, and a quasi-neutral region results which has a floating potential.
A MOSFET includes a lateral bipolar transistor. FIG. 1 shows a typical n-channel MOSFET with a floating body 20. The n-p-n construction of the device illustrates the structure of a bipolar device. With the channel region 22 of the device partially depleted and a high drain voltage applied, the electric field created in the device causes impact ionization such that electrons and holes are generated near the drain 26. The generated holes are injected into the body thereby creating a positively charged body. The first consequence of this positive charge accumulated in the body 20 is the increase of the body potential resulting in a decrease of the threshold voltage of the MOSFET. Since the body potential increase is dependent upon drain voltage, the variation of threshold voltage shows up as "kinks" in the output characteristics of the device. FIG. 2 is a plot of the output characteristics of a floating-body SOI MOSFET device which demonstrate this effect at "kinks" 10. The curves represent the drain current I.sub.D as a function of drain voltage V.sub.D at different gate voltages (V.sub.G =0, 1, 2, . . . 7 volts). The device width to length ratio is W/L=201/101.
The second consequence of the voltage increase is the eventual turn-on of the bipolar device. As the body of the MOSFET becomes positively-biased, the source-body junction (emitter-base) becomes forward-biased, and electrons are injected from the source into the body region. Those injected electrons reaching the drain (collector) depletion region add to the drain current. Thus, control of the current through the device using the MOS gate 30 is lost. This effect is referred to as the parasitic bipolar effect.
Therefore, a need exists for a MOSFET having reduced parasitic effects and providing the circuit performance necessary for integrated circuit applications including those employing CMOS circuits.